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SPMD code on heterogeneous architectures: compiler vectorization or hardware vectorization? Sylvain Collange |
We propose to generalize dynamic vectorization to general-purpose processors, by designing a new CPU-GPU hybrid core. This hybrid core will enable heterogeneous architectures mixing CPU cores and GPU cores that share the same instruction set and programming model. To offer the best performance on applications that mix sequential and parallel sections, most processors now incorporate GPU cores in addition to conventional CPU cores. GPU cores are programmed by spawning a large number of threads running the same code in languages such as OpenCL, CUDA or graphics shaders, which obey the Single-Program, Multiple-Data (SPMD) parallel programming model. GPUs take advantage of the instruction redundancy of SPMD code by vectorizing dynamically the application across threads, saving silicon area and energy. Unlike conventional static vectorization techniques based on compiler technology, GPUs may implement dynamic vectorization in hardware. Unfortunately, current GPU architectures lack the flexibility to work with standard instruction sets like x86 or ARM. Their implementation of dynamic vectorization needs specific instruction sets with control-flow reconvergence annotations, and is unable to manage threads individually.
We will see how we can overcome both of these limitations and extend dynamic vectorization to conventional instruction sets using a PC-based instruction fetch policy. In addition, this solution enable key improvements that were not possible in the traditional SIMD model, such as simultaneous execution of divergent paths. It also opens the way for a whole spectrum of new architectures, hybrids of latency-oriented superscalar processors and throughput-oriented SIMD GPUs.
Bio: Sylvain Collange is a Research Scientist at Inria Rennes. He was previously post-doc researcher at UFMG, Brazil and Assistant Professor at ENS Lyon, France. He received a PhD from Université de Perpignan, France in 2010 and a MSc from École normale supérieure de Lyon, France. He interned in the Developer Technology group at NVIDIA, Santa Clara, USA during his PhD.
His research interests include the architecture of throughput processors and Graphics-Processing Units and their use for
general-purpose computations, compiler optimizations for GPUs and special-purpose number systems and arithmetic units. He proposed the "scalarization" of redundant GPU computations in 2009, which has inspired dozens of academic and industrial projects. He is leading with Fernando Pereira an international collaboration project between four research groups at Inria and UFMG to investigate compiler optimization for many-core architectures.
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Lazy Evaluation needs a lazy type system
Doaitse Swierstra |
We argue that for lazily evaluated languages the conventional system F-based type systems are insufficiently expressive. We propose an approach to existential types which makes it possible to type a collection of useful programs which cannot be typed with more conventional type systems. We provide examples of useful program paradigms which are enabled by this extension. We will conclude with a view of existential types which makes them more dual to polymorphic types.
This is joint work with Marcos Viera (Universidad de la República, Uruguay) and Atze Dijkstra (Utrecht University, The Netherlands).
Bio: Doaitse Swierstra (1950) studied theoretical physics at Groningen University and got a Ph.D. from Twente University with a thesis subject in the area of programming language design. From 1983 to 2013 he has been a full professor of Computer Science at Utrecht University. He is one of the initiators of the Dutch research school IPA. Currently he is a professor emeritus.
Doaitse Swierstra is a long standing member of the IFIP Working Group 2.1, and has served on numerous program committees, such as POPL, ICFP and the Haskell Symposium. His research interests are programming methodology, functional programming, combinator languages and libraries, compositional programming methods, program analysis, program specification and verification, compiler construction, parsing, attribute grammars, generic programming, programming environments. He has thus far supervised 24 Ph.D. students (see: http://swierstra.net/SupervisedTheses)
